MM54HC73 Datasheet | National Semiconductor

Description These J-K Flip-Flops utilize advanced silicon-gate CMOS technology They possess the high noise immunity and low power dissipation of standard CMOS integrated circuits These devices can drive 10 LS-TTL loads These flip-flops are edge sensitive to the clock input and change state on the negative going transition of the clock pulse Each one has independent J K CLOCK and CLEAR inputs and Q and Q outputs CLEAR is independent of the clock and acplished by a low level on the input The 54HC 74HC logic family is functionally as well as pinout patible with the standard 54LS 74LS logic family All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground Features Y Y Y Y Y Typical propagation delay 16 ns Wide operating voltage range 2 - 6V Low input current 1 m A maximum Low quiescent current 40 m A (74HC Series) High output drive 10 LS-TTL loads Connection and Logic Diagrams Dual-In-Line Package Truth Table Inputs CLR L H H H H H CLK X J X L H L H X K X L L H H X Outputs Q Q v v v v L H Q0 Q0 H L L H TOGGLE Q0 Q0 Top View TL F 5072- 1 Order Number MM54HC73 or MM74HC73 TL F 5072 - 2 TL F 5072 - 3 (1 of 2) C1995 National Semiconductor Corporation TL F 5072 RRD-B30M115 Printed in U S A Data Sheet 4 U . .. Absolute Maximum Ratings (Notes 1 2) Operating Conditions Supply Voltage (VCC) DC Input or Output Voltage (VIN VOUT) Operating Temp Range (TA) MM74HC MM54HC Input Rise or Fall Times (tr tf) VCC e 2 0V VCC e 4 5V VCC e 6 0V Min 2 0 Max 6 VCC Units V V If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK IOK) DC Output Current per pin (IOUT) DC VCC or GND Current per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S O Package only Lead Temperature (TL) (Soldering 10 seconds) b 0 5 to a 7...