MM74HC133 Datasheet | National Semiconductor

Description This NAND gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits All gates have buffered outputs All devices have high noise immunity and the ability to drive 10 LS-TTL loads The 54HC 74HC logic family is functionally as well as pin-out patible with the standard 54LS 74LS logic family All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground Features Y Y Y Y Y Typical propagation delay 20 ns Wide power supply range 2 - 6V Low quiescent current 20 m A maximum (74HC Series) Low input current 1 m A maximum Fanout of 10 LS-TTL loads Connection and Logic Diagrams Dual-In-Line Package TL F 5134 - 1 Top View Order Number MM54HC133 or MM74HC133 TL F 5134 - 2 C1995 National Semiconductor Corporation TL F 5134 RRD-B30M105 Printed in U S A .. .. Absolute Maximum Ratings (Notes 1 2) Operating Conditions Min Supply Voltage VCC DC Input or Output Voltage VIN VOUT Operating Temp Range (TA) MM HC MM HC Input Rise or Fall Times VCC e V tr tf VCC e V VCC e V b b If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK IOK) DC Output Current per pin (IOUT) DC VCC or GND Current per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S O Package only Lead Temperature (TL) (Soldering 10 seconds) b 0 5 to a 7 0V b 1 5 to VCC a 1 5V b 0 5 to VCC a 0 5V g 20 m A g 25 m A g 50 m A Max VCC Units V V a a C C ns ns ns b 65 C to a 150 C 600 m W 500 m W 260 C DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC V V V V V V VIN e VIH or VIL l IOUTl s m A V V V V V V V V V V V V g g g TA e 25 C Typ 74HC TA eb40 to 85 C 54HC TA eb55 to 125 C Units Guaranteed Limits V V V V V V...