TP3403 Datasheet | National Semiconductor

Description The TP3401 TP3402 and TP3403 are plete monolithic transceivers for data transmission on twisted pair subscriber loops They are built on National’s double poly micro CMOS process and require only a single a 5 Volt supply Alternate Mark Inversion (AMI) line coding in which binary ‘1’s are alternately transmitted as a positive pulse then a negative pulse is used to ensure low error rates in the presence of noise with lower emi radiation than other codes such as Biphase (Manchester) Full-duplex transmission at 144 kb s is achieved on a single twisted wire pair using a burst-mode technique (Time pression Multiplexed) Thus the device operates as an ISDN ‘U’ Interface for short loop applications typically in a PBX environment providing transmission for 2 B channels and 1 D channel On 24 cable the range is at least 1 8 km (6k ft) System timing is based on a Master Slave configuration with the line card end being the Master which controls loop timing and synchronisation All timing sequences necessary for loop activation and de-activation are generated on-chip Selection of Master and Slave mode operation is programmed via the Microwire Control Interface A 2 048 MHz clock which may be synchronized to the system clock controls all transmission-related timing functions For the TP3401 this clock must be provided from an external source the TP3402 includes an oscillator circuit requiring an external crystal The TP3403 includes the functions of both the TP3401 and the TP3402 Features plete ISDN PBX 2-Wire Data Transceiver including Y 2 B plus D channel interface for PBX U Interface Y 144 kb s full-duplex on 1 twisted pair using Burst Mode Y Loop range up to 6 kft ( 24AWG) Y Alternate Mark Inversion coding with transmit filter and scrambler for low emi radiation Y Adaptive line equalizer Y On-chip timing recovery no external ponents Y Standard TDM interface for B channels Y Separate interface for D channel Y 2 048 MHz master clock Y Driver for line transformer Y 4...