Datasheet4U Logo Datasheet4U.com

MSM6948 - 1200 bps Single Chip FSK MODEM

General Description

The MSM6948/6948V is a single chip MSK (Minimum Shift Keying) modem which is fabricated by Oki’s low power consumption CMOS silicon gate technology.

The demodulator receives the data to be transmitted (SD) synchronized with the transmit timing clock (ST) generated by the on-chip clock generator.

Key Features

  • Signal power supply: +5 V On-chip SCF (Switched Capacitor Filter) The transmit filter can be also used as voice splatter filter. The receive timing re-generator has two different lock-in time performance options to be chosen from. Built-in crystal oscillation circuit Small number of external components for easy.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MSM699210 High Performance Digital Signal Processor OKI
MSM699215 High Performance Digital Signal Processor OKI
MSM6051 Built-in Melody Circuit and LCD Driver 4-Bit Microcontroller OKI electronic
MSM6052-xx Tone / Pulse Switchable Repertory Dialer OKI
MSM60801 PCMCIA Card Interface LSI OKI electronic componets

Other Datasheets by OKI Electric

Part Number Description
MSM6948-3 1200 bps Single Chip FSK MODEM
MSM6946 (MSM6926 / MSM6946) 300 bps Single Chip FSK MODEM
MSM6947 (MSM6927 / MSM6947) 1200 bps Single Chip FSK MODEM
MSM6949 Analog Front End LSI
MSM6912 PCM Channel Filter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
OKI Semiconductor MSM6948/6948V 1200 bps Single Chip MSK Modem FEDL6948_6948V-02 Issue Data: Jun 8, 2005 GENERAL DESCRIPTION The MSM6948/6948V is a single chip MSK (Minimum Shift Keying) modem which is fabricated by Oki’s low power consumption CMOS silicon gate technology. The demodulator receives the data to be transmitted (SD) synchronized with the transmit timing clock (ST) generated by the on-chip clock generator. The signal, which is modulated by MSK method, is output. The demodulator converts the received MSK signal to the received data (RD) by means of a delay detection technique after limiting the band of the received MSK signal. This signal is input to the digital PLL and the re-generated timing clock (RT) is output from the demodulator, synchronized with the RD.