80C85AHRS - MSM80C85AHRS

Datasheet Summary

Description

The MSM80C85AH is a complete 8-bit parallel; central processor implemented in silicon gate C-MOS technology and compatible with MSM80C85A.

Features

Power down mode (HALT-HOLD).
Low Power Dissipation: 50mW(Typ).
Single + 3 to + 6 V Power Supply.
40 to + 85°C, Operating Temperature.
Compatible with MSM80C85A.
0.8 ms instruction Cycle (VCC = 5V).
On-Chip Clock Generator (with External Crystal).
On-Chip System Controller; Advanced Cycle Status Information Available for Large System Control.
Bug operation in MSM80C85AH is fixed.
Four Vectored inte.

OKI electronic componets

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Datasheet Details

Part number	80C85AHRS
Manufacturer	OKI electronic componets
File Size	262.87 KB
Description	MSM80C85AHRS
Datasheet	80C85AHRS Datasheet
Additional preview pages of the 80C85AHRS datasheet.

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E2O0009-27-X2 ¡ Semiconductor MSM80C85AHRS/GS/JS ¡ Semiconductor 8-Bit CMOS MICROPROCESSOR This version: Jan. 1998 MSM80C85AHRS/GS/JS Previous version: Aug. 1996 GENRAL DESCRIPTION The MSM80C85AH is a complete 8-bit parallel; central processor implemented in silicon gate C-MOS technology and compatible with MSM80C85A. It is designed with higher processing speed (max.5 MHz) and lower power consumption compared with MSM80C85A and power down mode is provided, thereby offering a high level of system integration. www.DataSheet4U.com The MSM80C85AH uses a multiplexed address/data bus. The address is split between the 8bit address bus and the 8-bit data bus. The on-chip address latch : of a MSM81C55-5 memory product allows a direct interface with the MSM80C85AH.

Published: Oct 15, 2008 |