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MD56V62400 - 4-Bank x 4 /194 /304-Word x 4-Bit SYNCHRONOUS DYNAMIC RAM

Datasheet Summary

Description

The MD56V62400/H is a 4-bank 4,194,304-word

4-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology.

The device operates at 3.3 V.

The inputs and outputs are LVTTL compatible.

Features

  • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell 4-bank.
  • 4,194,304-word.
  • 4-bit configuration 3.3 V power supply, ± 0.3 V tolerance Input : LVTTL compatible Output : LVTTL compatible Refresh : 4096 cycles/64 ms Programmable data transfer mode.
  • CAS latency (2, 3).
  • Burst length (2, 4, 8).
  • Data scramble (sequential, interleave).
  • CBR auto-refresh, Self-refresh capabili.

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Datasheet Details

Part number MD56V62400
Manufacturer OKI electronic componets
File Size 303.20 KB
Description 4-Bank x 4 /194 /304-Word x 4-Bit SYNCHRONOUS DYNAMIC RAM
Datasheet download datasheet MD56V62400 Datasheet
Additional preview pages of the MD56V62400 datasheet.

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Full PDF Text Transcription

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E2G1050-17-X1 ¡ Semiconductor MD56V62400/H ¡ Semiconductor This version: Mar. 1998 MD56V62400/H Pr el im in ar y 4-Bank ¥ 4,194,304-Word ¥ 4-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62400/H is a 4-bank ¥ 4,194,304-word ¥ 4-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL compatible. FEATURES • • • • • • • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell 4-bank ¥ 4,194,304-word ¥ 4-bit configuration 3.3 V power supply, ± 0.
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