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MSM56V16800DH - 2-Bank x 1048576-Word x 8-Bit SYNCHRONOUS DYNAMIC RAM

Download the MSM56V16800DH datasheet PDF. This datasheet also covers the MSM56V16800D variant, as both devices belong to the same 2-bank x 1048576-word x 8-bit synchronous dynamic ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The MSM56V16800D/DH is a 2-bank 1,048,576-word

8-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology.

The device operates at 3.3 V.

The inputs and outputs are LVTTL compatible.

Key Features

  • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell 2-bank.
  • 1,048,576-word.
  • 8-bit configuration 3.3 V power supply, ± 0.3 V tolerance Input : LVTTL compatible Output : LVTTL compatible Refresh : 4096 cycles/64 ms Programmable data transfer mode.
  • CAS latency (1, 2, 3).
  • CAS latency (2, 3).
  • 1.
  • Burst length (1, 2, 4, 8, full page).
  • Burst length (1, 2, 4, 8).
  • 1.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MSM56V16800D_OKIelectroniccomponets.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number MSM56V16800DH
Manufacturer OKI Electric
File Size 340.16 KB
Description 2-Bank x 1048576-Word x 8-Bit SYNCHRONOUS DYNAMIC RAM
Datasheet download datasheet MSM56V16800DH Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
E2G1047-18-25 ¡ Semiconductor MSM56V16800D/DH ¡ Semiconductor ThisMSM56V16800D/DH version: Mar. 1998 Pr el im in ar y 2-Bank ¥ 1,048,576-Word ¥ 8-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MSM56V16800D/DH is a 2-bank ¥ 1,048,576-word ¥ 8-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL compatible. FEATURES • • • • • • • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell 2-bank ¥ 1,048,576-word ¥ 8-bit configuration 3.3 V power supply, ± 0.