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MSM548331 - Field Memory

Description

The MSM548331 is a 2.7-Mbit, 768 bits

290 lines, Field Memory.

Access is done line by line.

The line address must be set each time a line is changed.

Features

  • 768.
  • 290.
  • 12-bit configuration.
  • Line by line access.
  • X serial address inputs for random serial initial bit address.
  • Asynchronous operation.
  • Serial read and write cycle times Read cycle: 30 ns Write cycle: 30 ns.
  • Low operating supply voltage: 3.3 V ± 0.3 V.
  • Self-refresh.
  • Various address reset mode for picture processing.
  • Write mask function (Input enable control).
  • Data skipping function (Output en.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
E2L0037-17-Y1 www.DataSheet4U.com ¡ Semiconductor ¡ Semiconductor MSM548331 222,720-Word ¥ 12-Bit Field Memory This version: Jan. 1998 MSM548331 Previous version: Dec. 1996 DESCRIPTION The MSM548331 is a 2.7-Mbit, 768 bits ¥ 290 lines, Field Memory. Access is done line by line. The line address must be set each time a line is changed. More than two MSM548331s can be cascaded directly without any delay devices between them. Cascading MSM548331s provides larger capacity and longer delay. X serial address input enables random initial address setting of serial access in a page. Other than the random address setting, MSM548331 has several types of address set modes such as line hold, address jump to initial address and line increment.
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