| Part number | 74LS109A |
|---|---|
| Datasheet | 74LS109A_ONSemiconductor.pdf |
| File Size | 94.79 KB |
| Manufacturer | onsemi |
| Description | LOW POWER SCHOTTKY |
|
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SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop The SN74LS109A consists of two high speed pletely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop by simply connecting the J and K pins together.
| Brand Logo | Part Number | Description | Other Manufacturers |
|---|---|---|---|
 |
74LS109A | Dual J-K Positive-Edge-Triggered Flip-Flops | Texas Instruments |
 |
74LS109 | Dual J-K Flip-Flop | Agere Systems |
| Part Number | Description |
|---|---|
| 74LS10 | TRIPLE 3-INPUT NAND GATE |
| 74LS12 | LOW POWER SCHOTTKY |
| 74LS122 | LOW POWER SCHOTTKY |
| 74LS125 | LOW POWER SCHOTTKY |
| 74LS126 | LOW POWER SCHOTTKY |
| 74LS132 | LOW POWER SCHOTTKY |
| 74LS139 | LOW POWER SCHOTTKY |
| 74LS14 | LOW POWER SCHOTTKY |
| 74LS145 | 1-of-10 Decoder / Drvier Open-Collector |
| 74LS147 | LOW POWER SCHOTTKY |
