Datasheet4U Logo Datasheet4U.com

74VHC595 - 8-Bit Shift Register

General Description

The VHC595 is an advanced high

fabricated with silicon gate CMOS technology.

speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

bit serial

Key Features

  • High Speed: tPD = 5.4 ns (Typ. ) at VCC = 5 V.
  • Low Power Dissipation: ICC = 4 mA (Max. ) at TA = 25°C.
  • High Noise Immunity: VNIH = VNIL = 28% VCC (Min. ).
  • Power Down Protection is Provided on All Inputs.
  • Low Noise: VOLP = 0.9 V (Typ. ).
  • Pin and function compatible with 74HC595.
  • This is a Pb.
  • Free Device DATA SHEET www. onsemi. com 16 1 SOIC.
  • 16 D SUFFIX CASE 751BG 16 1 TSSOP.
  • 16 DT SUFFIX CASE 948AH.

📥 Download Datasheet

Datasheet Details

Part number 74VHC595
Manufacturer onsemi
File Size 273.88 KB
Description 8-Bit Shift Register
Datasheet download datasheet 74VHC595 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74VHC595 8-Bit Shift Register Fairchild Semiconductor
74VHC595 8-bit serial-in/serial-out or parallel-out shift register nexperia
74VHC595-Q100 8-bit serial-in/serial-out or parallel-out shift register nexperia
74VHC594 8-BIT SHIFT REGISTER STMicroelectronics
74VHC540 Octal Bus Buffer Motorola

Other Datasheets by onsemi

Part Number Description
74VHC540 Octal Bus Buffer
74VHC02 Quad 2-Input NOR Gate
74VHC02M Quad 2-Input NOR Gate
74VHC02MTC Quad 2-Input NOR Gate
74VHC02SJ Quad 2-Input NOR Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
8-Bit Shift Register with Output Latches 74VHC595 General Description The VHC595 is an advanced high−speed CMOS Shift Register fabricated with silicon gate CMOS technology. It achieves the high−speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device contains an 8−bit serial−in, parallel−out shift register that feeds an 8−bit D−type storage register. The storage register has eight 3−STATE outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct−overriding clear, serial input, and serial output (standard) pins for cascading. Both the shift register and storage register use positive−edge triggered clocks.