MC100E154 Overview
The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on either LEN1 or LEN2 (or both) latches the outputs.
MC100E154 Key Features
- For additional marking information, refer to Application Note AND8002/D
- For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering
- Rev. 8
- All VCC and VCCO pins are tied together on the die. Warning: All VCC, VCCO, and VEE pins must be externally connected to
- D4a D0b
- D4b SEL LEN1, LEN2 MR Q0- Q4, Q0
