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MC100E195 - PROGRAMMABLE DELAY CHIP

Description

designed primarily for clock de-skewing and timing adjustment.

It provides variable delay of a differential ECL input transition.

The delay section consists of a chain of gates organized as shown in the logic symbol.

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Datasheet Details

Part number MC100E195
Manufacturer onsemi
File Size 163.61 KB
Description PROGRAMMABLE DELAY CHIP
Datasheet download datasheet MC100E195 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC10E195, MC100E195 5 V ECL Programmable Delay Chip Description The MC10E/100E195 is a programmable delay chip (PDC) designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition. The delay section consists of a chain of gates organized as shown in the logic symbol. The first two delay elements feature gates that have been modified to have delays 1.25 and 1.5 times the basic gate delay of approximately 80 ps. These two elements provide the E195 with a digitally-selectable resolution of approximately 20 ps. The required device delay is selected by the seven address inputs D[0:6], which are latched on chip by a high signal on the latch enable (LEN) control.
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