Datasheet4U Logo Datasheet4U.com

MC100E196 - PROGRAMMABLE DELAY CHIP

Description

The MC10E/100E196 is a programmable delay chip (PDC) designed primarily for very accurate differential ECL input edge placement applications.

The delay section consists of a chain of gates and a linear ramp delay adjust organized as shown in the logic symbol.

Features

  • http://onsemi. com PLCC.
  • 28 FN SUFFIX CASE 776.

📥 Download Datasheet

Datasheet Details

Part number MC100E196
Manufacturer onsemi
File Size 184.13 KB
Description PROGRAMMABLE DELAY CHIP
Datasheet download datasheet MC100E196 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MC100E196 PROGRAMMABLE DELAY CHIP Motorola
MC100E193 ERROR DETECTION/ CORRECTION CIRCUIT Motorola
MC100E195 PROGRAMMABLE DELAY CHIP Motorola
MC100E101 Quad 4-Input OR/NOR Gate Motorola
MC100E104 QUINT 2-INPUT AND/NAND GATE Motorola

Other Datasheets by onsemi

Part Number Description
MC100E193 5V ECL Error Detection / Correction Circuit
MC100E195 PROGRAMMABLE DELAY CHIP
MC100E101 QUAD 4-INPUT OR/NOR GATE
MC100E104 QUINT 2-INPUT AND/NAND GATE
MC100E107 QUINT 2-INPUT XOR/XNOR GATE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com MC10E196, MC100E196 5V ECL Programmable Delay Chip Description The MC10E/100E196 is a programmable delay chip (PDC) designed primarily for very accurate differential ECL input edge placement applications. The delay section consists of a chain of gates and a linear ramp delay adjust organized as shown in the logic symbol. The first two delay elements feature gates that have been modified to have delays 1.25 and 1.5 times the basic gate delay of approximately 80 ps. These two elements provide the E196 with a digitally-selectable resolution of approximately 20 ps. The required device delay is selected by the seven address inputs D[0:6], which are latched on chip by a high signal on the latch enable (LEN) control.
Published: |