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MC100EL35 - JK Flip-Flop

General Description

The MC10EL/100EL35 is a high speed JK flip-flop.

enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock.

The reset pin is asynchronous and is activated with a logic HIGH.

Key Features

  • 525 ps Propagation Delay.
  • 2.2G Hz Toggle Frequency.
  • ESD Protection:.
  • > 1 kV Human Body Model.
  • > 100 V Machine Model.
  • PECL Mode Operating Range: VCC = 4.2 V to 5.7 with VEE = 0 V.
  • NECL Mode Operating Range: VCC = 0 V with VEE =.
  • 4.2 V to.
  • 5.7 V.
  • Internal Input Pulldown Resistors on J, K, CLK, and R.
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test.
  • Moisture Sensitivity:.
  • Level.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC10EL35, MC100EL35 5 V ECL JK Flip‐Flop Description The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic HIGH. The 100 Series contains temperature compensation. Features • 525 ps Propagation Delay • 2.2G Hz Toggle Frequency • ESD Protection: ♦ > 1 kV Human Body Model ♦ > 100 V Machine Model • PECL Mode Operating Range: VCC = 4.2 V to 5.7 with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.