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MC100EP210S - Dual Differential LVDS Compatible Clock Driver

Datasheet Summary

Description

The MC100EP210S is a low skew 1 to

designed with LVDS clock distribution in mind.

The LVDS or LVPECL input signals are differential and the signal is fanned out to five identical differential LVDS outputs.

Features

  • 20 ps Typical Output.
  • to.
  • Output Skew.
  • 85 ps Typical Device.
  • to.
  • Device Skew.
  • 550 ps Typical Propagation Delay.
  • The 100 Series Contains Temperature Compensati.

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Datasheet preview – MC100EP210S

Datasheet Details

Part number MC100EP210S
Manufacturer ON Semiconductor
File Size 137.36 KB
Description Dual Differential LVDS Compatible Clock Driver
Datasheet download datasheet MC100EP210S Datasheet
Additional preview pages of the MC100EP210S datasheet.

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Full PDF Text Transcription

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MC100EP210S 2.5V 1:5 Dual Differential LVDS Compatible Clock Driver Description The MC100EP210S is a low skew 1−to−5 dual differential driver, designed with LVDS clock distribution in mind. The LVDS or LVPECL input signals are differential and the signal is fanned out to five identical differential LVDS outputs. The EP210S specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. Two internal 50 W resistors are provided across the inputs. For LVDS inputs, VTA and VTB pins should be unconnected. For LVPECL inputs, VTA and VTB pins should be connected to the VTT (VCC − 2.0 V) supply.
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