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MC100EPT23 - Dual Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator

Datasheet Summary

Description

LVTTL/LVCMOS translator.

Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only + 3.3 V and ground are required.

Features

  • 1.5 ns Typical Propagation Delay.
  • Maximum Operating Frequency > 275 MHz.
  • LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs.
  • 24 mA LVTTL Outputs.
  • Operating Range:.
  • VCC = 3.0 V to 3.6 V with GND = 0 V.
  • These Devices are Pb-Free, Halogen Free and are RoHS Compliant www. onsemi. com 8 1 SOIC.
  • 8 NB D SUFFIX CASE 751.
  • 07 8 1 TSSOP.
  • 8 DT SUFFIX CASE 948R.
  • 02 DFN.
  • 8 MN SUFFIX CASE 506AA 3T M G G.

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Datasheet Details

Part number MC100EPT23
Manufacturer ON Semiconductor
File Size 148.77 KB
Description Dual Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
Datasheet download datasheet MC100EPT23 Datasheet
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MC100EPT23 3.3 V Dual Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator Description The MC100EPT23 is a dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only + 3.3 V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the EPT23 makes it ideal for applications which require the translation of a clock or data signal. The EPT23 is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external VBB reference, the EPT23 does not require both ECL standard versions. The LVPECL/LVDS inputs are differential.
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