MC100EPT23 Description
The MC100EPT23 is a dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only + 3.3 V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the EPT23 makes it ideal for applications which require the translation of a clock or data signal.
MC100EPT23 Key Features
- 1.5 ns Typical Propagation Delay
- Maximum Operating Frequency > 275 MHz
- LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs
- 24 mA LVTTL Outputs
- Operating Range
- VCC = 3.0 V to 3.6 V with GND = 0 V
- These Devices are Pb-Free, Halogen Free and are RoHS pliant
- For additional marking information, refer to Application Note AND8002/D
- Rev. 19
- Pins will default to VCC/2 when left open