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MC10H645 - 2:1:9 TTL Clock Driver

General Description

Driver.

28 for optimal power and signal pin placement.

Key Features

  • a 24 mA TTL output stage with AC performance specified into a 50 pF load capacitance. A 2:1 input Mux is provided on chip to allow for distributing both system and diagnostic clock signals or designing clock redundancy into a system. With the SEL input held LOW the DO input will be selected, while the D1 input is selected when the SEL input is forced HIGH. Features.
  • Low Skew Typically 0.65 ns Within Device.
  • Guaranteed Skew Spec 1.25 ns Part.
  • to.
  • Part.
  • Inp.

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Datasheet Details

Part number MC10H645
Manufacturer onsemi
File Size 63.98 KB
Description 2:1:9 TTL Clock Driver
Datasheet download datasheet MC10H645 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC10H645 2:1:9 TTL Clock Driver Description The MC10H645 is a single supply, low skew, TTL I/O 2:1:9 Clock Driver. Devices in the H600 clock driver family utilizes the PLCC−28 for optimal power and signal pin placement. The device features a 24 mA TTL output stage with AC performance specified into a 50 pF load capacitance. A 2:1 input Mux is provided on chip to allow for distributing both system and diagnostic clock signals or designing clock redundancy into a system. With the SEL input held LOW the DO input will be selected, while the D1 input is selected when the SEL input is forced HIGH. Features • Low Skew Typically 0.65 ns Within Device • Guaranteed Skew Spec 1.