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MC74AC273 Datasheet Octal D Flip-flop

Manufacturer: onsemi

Overview: Octal D Flip-Flop MC74AC273, MC74ACT273 The MC74AC273/74ACT273 has eight edge-triggered D−type flip−flops with individual D inputs and Q outputs. The mon buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip−flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW−to−HIGH clock transition, is transferred to the corresponding flip−flop’s Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are mon to all storage elements.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • Ideal Buffer for MOS Microprocessor or Memory.
  • Eight Edge-Triggered D Flip.
  • Flops.
  • Buffered Common Clock.
  • Buffered, Asynchronous Master Reset.
  • See MC74AC377 for Clock Enable Version.
  • See MC74AC373 for Transparent Latch Version.
  • See MC74AC374 for 3-State Version.
  • Outputs Source/Sink 24 mA.
  • ′ACT273 Has TTL Compatible Inputs.
  • These are Pb.
  • Free Devices VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP 20 19 18 17.

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