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MC74HC126A - Quad 3-State Noninverting Buffers

This page provides the datasheet information for the MC74HC126A, a member of the MC74HC125A Quad 3-State Noninverting Buffers family.

Datasheet Summary

Features

  • Output Drive Capability: 15 LSTTL Loads.
  • Outputs Directly Interface to CMOS, NMOS, and TTL.
  • Operating Voltage Range: 2.0 to 6.0 V (HC), 4.5 to 5.5 V (HCT).
  • Low Input Current: 1.0 mA.
  • High Noise Immunity Characteristic of CMOS Devices.
  • In Compliance with the JEDEC Standard No. 7 A Requirements.
  • Chip Complexity: 72 FETs or 18 Equivalent Gates.
  • Q Suffix for Automotive and Other.

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Datasheet Details

Part number MC74HC126A
Manufacturer ON Semiconductor
File Size 286.91 KB
Description Quad 3-State Noninverting Buffers
Datasheet download datasheet MC74HC126A Datasheet
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Full PDF Text Transcription

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DATA SHEET www.onsemi.com Quad 3-State Noninverting Buffers High−Performance Silicon−Gate CMOS MC74HC125A, MC74HCT125A, MC74HC126A The MC74HC125A/MC74HCT125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The MC74HCT125A device inputs are compatible with Standard CMOS or TTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems. The devices have four separate output enables that are active−low (HC125A) or active−high (HC126A).
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