MC74HCT595A Overview
The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock inputs.
MC74HCT595A Key Features
- Output Drive Capability: 15 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V (HC), 4.5 to 5.5 V (HCT)
- Low Input Current: 1.0 mA
- High Noise Immunity Characteristic of CMOS Devices
- In pliance with the Requirements Defined by JEDEC
- Chip plexity: 328 FETs or 82 Equivalent Gates
- Improvements over HC595/HCT595
- Improved Propagation Delays
- 50% Lower Quiescent Power