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NB3N2302 - 3.3V / 5V 5MHz to 133MHz Frequency Multiplier and Zero Delay Buffer

Datasheet Summary

Description

5 MHz to 133 MHz with a 3.3 V or 5 V power supply.

It accepts a reference input and drives a B1 and a B2 clock output.

chip PLL which locks to the input reference clock presented on the REF_IN pin.

Features

  • Output Frequency Range: 5 MHz to 133 MHz.
  • Two LVTTL/LVCMOS Outputs.
  • 65 ps Typical Jitter OUT2.
  • 115 ps Typical Jitter OUT1.
  • 25 ps Typical Output.
  • to.
  • Output Skew.
  • Operating Voltage Range: VDD = 3.3 V $5% or 5 V $10%.
  • Clock Multiplication of the Reference Input Frequency, See Table 1 for Options.
  • Packaged in 8.
  • Pin SOIC.
  • 40°C to +85°C Ambient Operating Temperature Range.
  • Ideal f.

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Datasheet Details

Part number NB3N2302
Manufacturer ON Semiconductor
File Size 130.31 KB
Description 3.3V / 5V 5MHz to 133MHz Frequency Multiplier and Zero Delay Buffer
Datasheet download datasheet NB3N2302 Datasheet
Additional preview pages of the NB3N2302 datasheet.

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Full PDF Text Transcription

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NB3N2302 3.3V / 5V 5MHz to 133MHz Frequency Multiplier and Zero Delay Buffer Description The NB3N2302 is a versatile Zero Delay Buffer that operates from 5 MHz to 133 MHz with a 3.3 V or 5 V power supply. It accepts a reference input and drives a B1 and a B2 clock output. The NB3N2302 has an on−chip PLL which locks to the input reference clock presented on the REF_IN pin. The PLL feedback is required to be driven to the FBIN pin and can be obtained by connecting either the OUT1 or OUT2 pin to the FBIN pin. The Function Select inputs control the various multiplier output frequency combinations as shown in Table 1.
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