NB6L11S Overview
Pin Name I/O Description 1 Q0 LVDS Output Non−inverted D output. Typically loaded with 100 W receiver termination resistor across differential pair. 2 Q0 LVDS Output Inverted D output.
NB6L11S Key Features
- Input Clock Frequency > 2.0 GHz
- Input Data Rate > 2.5 Gb/s
- RMS Clock Jitter -0.5 ps, Typical
- 622 Mb/s Data Dependent Jitter
- 6 ps, Typical
- 380 ps Typical Propagation Delay
- 120 ps Typical Rise and Fall Times
- Single Power Supply; VCC = 2.5 V " 5%
- These are Pb-Free Devices
- For additional marking information, refer to Application Note AND8002/D