Output Drive Compatibility: 10 LSTTL Loads Outputs Directly Interface to CMOS Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA MSL Level 1 Chip Complexity: 162 FET Pb.
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NLSF1174 Hex D Flip−Flop with Common Clock and Reset
This device consists of six D flip−flops with common Clock and Reset inputs. Each flip−flop is loaded with a low−to−high transition of the Clock input. Reset is asynchronous and active low. All inputs/outputs are standard CMOS compatible.
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Output Drive Compatibility: 10 LSTTL Loads Outputs Directly Interface to CMOS Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA MSL Level 1 Chip Complexity: 162 FET Pb−Free Package is Available*
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QFN−16 MN SUFFIX CASE 485G
MARKING DIAGRAM
Q0 16
Reset 15
VCC 14
Q5 13
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NLSF1174 Datasheet
