NLV74VHC1GT126 Description
The NLV74VHC1G126 has CMOS−level input thresholds while the NLV74VHC1GT126 has TTL−level input thresholds. The internal circuit is posed of three stages, including a buffered 3−state output which provides high noise immunity and stable output. The input structures provide protection when voltages up to 5.5 V are applied, regardless of the supply voltage.
NLV74VHC1GT126 Key Features
- Designed for 2.0 V to 5.5 V VCC Operation
- 3.5 ns tPD at 5 V (typ)
- Inputs/Outputs Over-Voltage Tolerant up to 5.5 V
- IOFF Supports Partial Power Down Protection
- Source/Sink 8 mA at 3.0 V
- Available in SC-88A, TSOP-5 and SOT-953 Packages
- Chip plexity < 100 FETs
- NLV Prefix for Automotive and Other