PACVGA105 Overview
Key Features
- Seven Channels of ESD Protection Designed to Meet IEC-1000-4-2 Level-4 ESD Requirements (8 kV Contact Discharge)
- Very Low Loading Capacitance from ESD Protection Diodes at Less than 5 pF Typical
- TTL to CMOS Level-Translating Buffers for the HSYNC and VSYNC Lines
- Three Independent Supply Pins (VCC, VRGB and VAUX) to Facilitate Operation with Sub-Micro
