NTB75N03R Datasheet | onsemi

Features - - - - http://onsemi. Planar HD3e Process for Fast Switching Performance Low RDS(on) to Minimize Conduction Loss Low Ciss to Minimize Driver Loss Low Gate Charge 75 AMPERES 25 VOLTS RDS(on) = 5.6 mΩ (Typ) 4 Unit Vdc Vdc °C/W W A A °C/W W A °C/W W A °C m J 1 Gate 260 °C 2 Drain 3 Source 75N03 Y WW 1 Gate P75N03R YWW 1 2 TO- 220AB CASE 221A STYLE 5 3 1 2 3 D2PAK CASE 418AA STYLE 2 4 25 ±20 1.68 74.4 75 225 60 2.08 12.6 100 1.25 9.7 MAXIMUM RATINGS (TJ = 25°C Unless otherwise specified) Parameter Drain- to- Source Voltage Gate- to- Source Voltage - Continuous Thermal Resistance - Junction- to- Case Total Power Dissipation @ TC = 25°C Drain Current - Continuous @ TC = 25°C - Single Pulse (tp = 10 ms) Thermal Resistance - Junction- to- Ambient (Note 1) Total Power Dissipation @ TA = 25°C Drain Current - Continuous @ TA = 25°C Thermal Resistance - Junction- to- Ambient (Note 2) Total Power Dissipation @ TA = 25°C Drain Current - Continuous @ TA = 25°C Operating and Storage Temperature Range Single Pulse Drain- to- Source Avalanche Energy - Starting TJ = 25°C (VDD = 30 Vdc, VGS = 10 Vdc, IL = 12 Apk, L = 1 m H, RG = 25 W) Maximum Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds Symbol VDSS VGS Rq JC PD ID IDM Rq JA PD ID Rq JA PD ID TJ, Tstg EAS Value MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain - 55 to 150 71.7 75N03R YWW 2 Drain 3 Source 1. When surface mounted to an FR4 board using 1 inch pad size, (Cu Area 1.127 in2). 2. When surface mounted to an FR4 board using minimum remended pad size, (Cu Area 0.412 in2). = Device Code = Year = Work Week ORDERING INFORMATION Device NTP75N03R NTB75N03R NTB75N03RT4 Package TO- 220AB D2PAK D2PAK Shipping† 50 Units/Rail 50 Units/Rail 800/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor ponents Industries, LLC, 2003 October, 2003 - Rev....