Download MTB15N06V Datasheet PDF
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MTB15N06V Description

MTB15N06V Designer’s™ Data Sheet TMOS V™ Power Field Effect Transistor D2PAK for Surface Mount N−Channel Enhancement−Mode Silicon Gate TMOS V is a new technology designed to achieve an on−resistance area product about one−half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS E−FET designs, TMOS V is designed to...

MTB15N06V Key Features

  • On-resistance Area Product about One-half that of Standard
  • Faster Switching than E-FET Predecessors
  • Avalanche Energy Specified
  • IDSS and VDS(on) Specified at Elevated Temperature
  • Static Parameters are the Same for both TMOS V and TMOS E-FET
  • Surface Mount Package Available in 16 mm 13-inch/2500 Unit Tape
  • Rev. 3
  • Continuous Gate-Source Voltage
  • Non-Repetitive (tp ≤ 10 ms)
  • Continuous @ 25°C Drain Current