Download PACVGA105 Datasheet PDF
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PACVGA105 Description

The PACVGA105 incorporates 7 channels of ESD protection for signal lines monly found in a VGA port for PCs. ESD protection is implemented with current steering diodes designed to safely handle the high peak surge currents associated with the IEC−1000−4−2 Level−4 ESD Protection Standard (8 kV contact discharge). When the channels are subjected to an electrostatic discharge, the ESD current pulse is diverted via the...

PACVGA105 Key Features

  • Seven Channels of ESD Protection Designed to Meet
  • Very Low Loading Capacitance from ESD Protection Diodes at
  • TTL to CMOS Level-Translating Buffers for the HSYNC and
  • High impedance Pull-Ups (50 kW Nominal to VAUX) for HSYNC
  • Pull-Up Resistors (1.8 kW Nominal to VCC) for DDC_CLK and
  • pact 16-Pin QSOP Package
  • These Devices are Pb-Free and are RoHS pliant