SN74LS280
Overview
- This design permits the LS280 to be substituted for the LS180 which results in improved performance. The LS280 has buffered inputs to lower the drive requirements to one LS unit load.
- Generates Either Odd or Even Parity for Nine Data Lines
- Typical Data-to-Output Delay of only 33 ns
- Cascadable for n-Bits
- Can Be Used To Upgrade Systems Using MSI Parity Circuits
- Typical Power Dissipation = 80 mW INPUTS VCC F E
- C B A
