Implements the MIL-STD-1750A Instruction Set Architecture
CMOS/SOS Processor with 32 and 48-Bit Floating Point Arithmetic
Integer DAIS Mix Performance 3.0 MIPS at 30 MHz
Available with Class S type manufacturing, screening, and testing
SOS Insulated substrate technology provides absolute latch up immunity and excellent SEU tolerance
Total Dose ≥ 100 Krads (Si)
20, 25, and 30 MHz operation over the Military Temperature Range
Extensive Error and Fault Management and Interrupt Capability
Built-In.
Full PDF Text Transcription for P1750A-SOS (Reference)
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P1750A/SOS SINGLE CHIP, 20MHz to 30MHz, CMOS/SOS SPACE PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture CMOS/SOS Processor with 32 and 48-Bit ...
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0A Instruction Set Architecture CMOS/SOS Processor with 32 and 48-Bit Floating Point Arithmetic Integer DAIS Mix Performance 3.
P1750A-SOS Datasheet
