P1750A-SOS Datasheet | PYRAMID

FEATURES Implements the MIL-STD-1750A Instruction Set Architecture CMOS/SOS Processor with 32 and 48-Bit Floating Point Arithmetic Integer DAIS Mix Performance 3.0 MIPS at 30 MHz Available with Class S type manufacturing, screening, and testing SOS Insulated substrate technology provides absolute latch up immunity and excellent SEU tolerance Total Dose ≥ 100 Krads (Si) 20, 25, and 30 MHz operation over the Military Temperature Range Extensive Error and Fault Management and Interrupt Capability Built-In Self Test 24 User Accessible Registers Single 5V ± 10% Power Supply TTL Signal Level patible Inputs and Outputs Multiprocessor and Co-processor capability Built-In Function (BIF) for User Defined Instructions Two programmable Timers SOS devices are fully interchangeable with application-proven CMOS P1750A Processors; SMD 5962-87665 Available in: - 68-Lead Quad Pack (Leaded Chip Carrier) with Optional Gull...