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P4C1298 - ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM

General Description

The P4C1298/L are a 262,144-bit ultra high speed static RAM organized as 64K x 4.

The CMOS memory requires no clock or refreshing and has equal access and cycle times.

Inputs and outputs are fully TTL-compatible.

Key Features

  • Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times).
  • 15/20/25/35 ns (Commercial/Industrial).
  • 15/20/25/35/45 ns (Military) Low Power Single 5V±10% Power Supply Output Enable & Chip Enable control functions Data Retention with 2.0V Supply Three-State Outputs TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved).
  • 28-Pin 300 mil DIP, SOJ.
  • 28-Pin 350x550 mil LCC.

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Datasheet Details

Part number P4C1298
Manufacturer PYRAMID
File Size 120.07 KB
Description ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM
Datasheet download datasheet P4C1298 Datasheet

Full PDF Text Transcription for P4C1298 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for P4C1298. For precise diagrams, and layout, please refer to the original PDF.

P4C1298/P4C1298L ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 15/20/25/35 ns (Commercial/Industrial) –...

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ual Access and Cycle Times) – 15/20/25/35 ns (Commercial/Industrial) – 15/20/25/35/45 ns (Military) Low Power Single 5V±10% Power Supply Output Enable & Chip Enable control functions Data Retention with 2.0V Supply Three-State Outputs TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved) – 28-Pin 300 mil DIP, SOJ – 28-Pin 350x550 mil LCC DESCRIPTION The P4C1298/L are a 262,144-bit ultra high speed static RAM organized as 64K x 4. The CMOS memory requires no clock or refreshing and has equal access and cycle times. Inputs and outputs are fully TTL-compatible. The RAM operates from a single

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