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2SK662 - Silicon N-Channel Junction FET

Download the 2SK662 datasheet PDF. This datasheet also covers the 2SK0662 variant, as both devices belong to the same silicon n-channel junction fet family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • 0.3+0.1.
  • 0.0 3 0.15+0.10.
  • 0.05 G High mutual conductance gm G Low noise type G S-mini type package, allowing downsizing of the sets and automatic insertion through the tape/magazine packing. 1.25±0.10 2.1±0.1 5° 1 2 (0.65) (0.65) 1.3±0.1 I Absolute Maximum Ratings (Ta = 25°C) Parameter Drain to Source voltage Gate to Drain voltage Drain current Gate current Allowable power dissipation Junction temperature Storage temperature Symbol VDSX VGDO ID IG PD Tj Tstg Ratings 30.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (2SK0662_PanasonicSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 2SK662
Manufacturer Panasonic
File Size 84.71 KB
Description Silicon N-Channel Junction FET
Datasheet download datasheet 2SK662 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Silicon Junction FETs (Small Signal) 2SK0662 (2SK662) Silicon N-Channel Junction FET For low-frequency amplification unit: mm (0.425) I Features 0.3+0.1 –0.0 3 0.15+0.10 –0.05 G High mutual conductance gm G Low noise type G S-mini type package, allowing downsizing of the sets and automatic insertion through the tape/magazine packing. 1.25±0.10 2.1±0.1 5° 1 2 (0.65) (0.65) 1.3±0.1 I Absolute Maximum Ratings (Ta = 25°C) Parameter Drain to Source voltage Gate to Drain voltage Drain current Gate current Allowable power dissipation Junction temperature Storage temperature Symbol VDSX VGDO ID IG PD Tj Tstg Ratings 30 −30 20 10 150 125 −55 to +125 Unit V V mA mA mW °C °C 2.0±0.2 10° 1: Source 2: Drain 3: Gate 0 to 0.1 0.9±0.1 0.9+0.2 –0.