MN6152U
Overview
The MN6152U is a CMOS LSI for a phase-locked loop (PLL) frequency synthesizer with serial data input. It consists of a two-coefficient prescaler, variable frequency divider, phase parator, and charge pump. It offers high-speed operation on a low power supply voltage (1.8 to 2.5 V) and low power consumption (5 m W for VDD=2.0 V, F IN=100 MHz). Other features include intermittent operation by the power save (PS) control signal and high-speed pull-in that rapidly corrects the phase differences occurring at the start of operation.
Pin Assignment
XIN XOUT FV VDD DOP VSS LD FIN
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
OR OV LC FR PS LE DATA CLK
Features
Low power supply voltage: VDD =1.8 to 2.5V Low power consumption: 5m W (VDD =2.0V, FIN =100MHz) High-speed operation: FIN =175MHz Frequency dividing ratios in reference frequency dividing stage: 5 to 131,071 Frequency dividing ratios in parator stage: 272 to 262,143 Lock detector output pin Two types of phase parator output
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