PDM41024 Overview
The PDM41024 is a high-performance CMOS static RAM organized as 131,072 x 8 bits. Writing is acplished when the write enable (WE) and the chip enable (CE1) inputs are both LOW and CE2 is HIGH. Reading is acplished when WE and CE2 remain HIGH and CE1 and OE are both LOW.
PDM41024 Key Features
- PDM41024SA Active: 450 mW Standby: 50 mW
- PDM41024LA Active: 400 mW Standby: 25mW Single +5V (±10%) power supply TTL-patible inputs and outputs Packages Plastic S
- TSO Plastic SOJ (400 mil)
- SO Plastic TSOP (I)- T
- Input Data Control Column I/O
- Control
- 4/09/98