PE3335 Datasheet | pSemi

Product Specification Product Description Peregrine’s PE3335 is a high performance integer-N PLL capable of frequency synthesis up to 3000 MHz. The superior phase noise performance of the PE3335 makes it ideal for applications such as LMDS / MMDS / WLL basestations and demanding terrestrial systems. The PE3335 Features a 10/11 dual modulus prescaler, counters, phase parator and a charge pump as shown in Figure 1. Counter values are programmable through either a serial or parallel interface and can also be directly hard wired. The PE3335 Phase Locked-Loop is optimized for terrestrial applications. It is manufactured on Peregrine’s Ultra CMOS™ process, a patented variation of silicon-oninsulator (SOI) technology on a sapphire substrate, offering the performance of Ga As with the economy and integration of conventional CMOS. 3000 MHz Ultra CMOS™ Integer-N PLL for Low Phase Noise Applications Features - 3000 MHz operation - ÷10/11 dual modulus prescaler - Internal phase detector with charge pump - Serial, parallel or hardwired programmable - Ultra-low phase noise - Available in 44-lead PLCC and 7x7 mm 48-lead QFN packages Figure 1. Block Diagram Fin .. Fin Prescaler 10/11 Main Counter 13 fp D(7:0) 8 Sdata Pre_en M(6:0) A(3:0) R(3:0) fr Primary 20-bit 20 Latch Secondary 20-bit Latch 20 20 20 16 Phase Detector PD_U PD_D Charge Pump 6 fc R Counter Document No. 70-0049-02 │ .psemi. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 15 Product Specification Figure 2. Pin Configurations (Top View) GND GND...