PI6CDBL401B Overview
The PI6CDBL401B is a 4-output low power buffer for 100MHz PCIe Gen1, Gen2 and Gen3 applications with integrated output terminations providing Zo=100Ω. The device has 4 output enables for clock management, and 3 selectable SMBus addresses. Applications ÎÎPCIe 3.0/2.0/1.0 clock distribution OE(3:0)# CLK_IN CLK_IN# SADR_tri HIBW_BYPM_LOBW# CKPWRGD_PD# SDATA_3.3 SCLK_3.3 CONTROL LOGIC ZDB PLL 4 CLK(3:0) All trademarks...