PI6LC4830 Datasheet | Pericom Semiconductor

HiFlexTM Network Clock Generator Features ÎÎ3.3V supply voltage ÎÎ3 HCSL and 1 LVCMOS 100MHz outputs with OE/ function ÎÎ1 LVCMOS 100/50MHz selectable ÎÎ25MHz crystal or differential input ÎÎLow 1ps RMS max integrated phase noise design ÎÎPLL Bypass mode for test ÎÎ32 lead 5x5mm TQFN package Description The PI6LC4830 is an LC VCO based low phase noise design intended for the most demanding PCIe® 2.0 applications. Use of the ultra-low noise LC VCO allows for much greater noise margins than traditional solutions. This is ideal for noisy environments. Pin Configuration VDDA_PLL VDD QA_OE VDD_Out IREF QA0+ QA0GND PLL_Byps REF_OUT_OE QB_OE QB_DIV2 VDD_PLL IN+ INVDD_REF_Out 32 31...