PI90LV02 Description
The PI90LV02 and PI90LVT02 are single differential line receivers that use low-voltage differential signaling (LVDS) to support data rates up to 400 Mbps. These products are designed for applications requiring high-speed, low-power consumption, low-noise generation, and a small package. A differential input signal (350mV) is translated by the device to a 3.3V CMOS output level.
PI90LV02 Key Features
- Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
- Signaling rates up to 400 Mbps
- Interfaces to LVDS, LVPECL
- Bus-Terminal ESD exceeds 10kV
- Differential Input Voltage Threshold less than 100mV
- Typical Propagation Delay Times of 2.6ns
- Typical Power Dissipation of 40mW @200 MHz
- Low Voltage TTL (LVTTL) Level is 5V Tolerant
- Open-Circuit Fail Safe
- Output are High Impedance with VCC <1.5V