PT7C4050 - PLL

Description

The device is composed of phase-lock loop with integrated VCXO for use in clock recovery, data retiming, frequency translation and clock smoothing applications in telecom and datacom systems.

Crystal Frequencies Supported: 12.624~38.880MHz.

Features

PLL with quartz stabilized VCXO Crystal output jitter less than 20ps Dual redundant reference input clocks with loss of signal detection Manual or automatic switch over between reference input clocks VCXO provides smooth output transition during switch over of input clocks Lock detection Selectable metal mask options for phase detectors, op. Amps, and charge.

Pericom Semiconductor

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Datasheet Details

Part number	PT7C4050
Manufacturer	Pericom Semiconductor
File Size	436.95 KB
Description	PLL
Datasheet	PT7C4050 Datasheet
Additional preview pages of the PT7C4050 datasheet.

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www.DataSheet4U.com Data Sheet PT7C4050 PLL with Integrated VCXO Description The device is composed of phase-lock loop with integrated VCXO for use in clock recovery, data retiming, frequency translation and clock smoothing applications in telecom and datacom systems. Crystal Frequencies Supported: 12.624~38.880MHz.

Published: Oct 8, 2007 |