Download PT7C4511 Datasheet PDF
PT7C4511 page 2
Page 2
PT7C4511 page 3
Page 3

PT7C4511 Description

 Zero ppm multiplication error The PT7C4511 is a high performance frequency  Input crystal frequency of 5 - 30 MHz multiplier, which integrates Analog Phase Lock Loop  Input clock frequency of 1 - 50 MHz techniques. It is designed to replace crystal oscillators in most electronic systems, clock multiplier and frequency translation. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental...

PT7C4511 Key Features

  • Zero ppm multiplication error
  • Input crystal frequency of 5
  • 30 MHz
  • Input clock frequency of 1
  • 50 MHz
  • Output clock frequencies up to 200 MHz
  • Peak to Peak Jitter less than 200ps over 200ns
  • Low period jitter 50ps (100~200MHz)
  • 9 selectable frequencies controlled by S0, S1 pins
  • Operating voltages of 3.0 to 5.5V