Pericom Semiconductor PI6C105
The PI6C105 is a high-speed, low-noise clock generator designed to work with the PI6C18x family of clock buffers to meet all clock needs for Mobile Intel Architecture platforms. The 3.3V power supply powers a portion of the I/O and the core. The 2.5V is used to power the remaining outputs.| Part No. | PI6C105 |
|---|---|
| Datasheet | PI6C105 Download |
| Manufacturer |  Pericom Semiconductor |
| Description | Precision Clock Synthesizer |
| Buy | Stock & Price |
FEATURES
● Two copies of CPU clock with VDD of 2.5V ±5%●
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● 100 MHz or 66 MHz operation Six copies PCI clock (synchronous with CPU clock) 3.3V One copy of Ref. clock @ 14.31818 MHz (3.3VTTL) 48 MHz USB Clock, 24 MHz Super I/O clock I2C Serial Configuration Interface Spread Spectrum Modulation for CPUCLK, and PCICLK Low-cost 14.31818 MHz crystal oscillator input Power management control Isolated core VDD, VSS pins for noise reduction 28-pin SSOP and SOIC package (H)
DESCRIPTION
CPU and chipset clock frequencies of 66.6 MHz and 100 MHz are supported. Split supplies of 3.3V and 2.5V are used. The 2.5V is used to power the remaining outputs. 2.5V signaling follows JEDEC standard 8-X. Power sequencing of the 3.3V and 2.5V supplies is not required. An asynchronous PWR_DWN# signal may be used to power down (or up) the system in an orderly manner. Block Diagram Pin Configuration XTAL_IN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 V SSREF V DDREF REF V DDCPU CPUCLK0 CPUCLK1...
