PL611-30 Datasheet | PhaseLink Corporation

Preliminary Programmable Quick Turn Clock T M Features Advanced programmable PLL design Very low Jitter and Phase Noise (< 40ps Pk-Pk typical) Output frequency up to 375MHz CMOS. Supports differential CMOS output to produce PECL, LVDS inputs. - Crystal inputs: o Fundamental crystal: 10MHz-30MHz o 3 RD overtone crystal: Up to 75MHz .. o Reference input: Up to 200MHz - Accepts <1.0V reference signal input voltage - One programmable I/O pin can be configured as Output Enable (OE), or Frequency Selection input (FSEL), or Reference clock. - Single 3.3V ± 10% power supply - Operating temperature range from -40 ° C to 85 ° C - Available in 8-pin MSOP/SOIC, 6-pin SOT...