Philips 74F260
Dual 5-input NOR gate
DESCRIPTION
14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F260N N74F260D PKG DWG # SOT27-1 SOT108-1 D1e Q0 Q1 GND SF00829 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS Dna, Dnb, Dnc, Dnd, Dne Q0, Q1 Data inputs Data outputsDESCRIPTION
74F (U.L.) HIGH/LOW 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20µA/0.6mA 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL LOGIC DIAGRAM D0a 1 2 3 12 13 5 1 2 3 12 13 8 9 10 11 4 D0b D0c Q0 D0a D0b D0c D0d D0e D1a D1b D1c D1d D1e D0d D0e Q0 Q1 D1a D1b 8 9 10 11 4 6 Q1 5 VCC = Pin 14 GND = Pin 7 6 D1c D1d SF00830 VCC = Pin 14 GND = Pin 7 D1e SF00832 IEC/IEEE SYMBOL FUNCTION TABLE INPUTS 1 2 3 12 13 8 9 6 10 11 4 5 OUTPUT Dnd X X X H X L Dne X X X X H L Qn L L L L L H ≥1 Dna H X X X X L Dnb X H X X X L Dnc X X H X X L H = High voltage level L = Low voltage level X = Don’t care SF00831 1988 Nov 29 2 853–0048 95209 Philips Semiconductors Product spe...