74F544 Datasheet | Philips Semiconductors

FEATURES 74F543, 74F544 Octal registered transceiver, non-inverting (3-State) Octal registered transceiver, inverting 93-State) FUNCTIONAL DESCRIPTION The 74F543 and 74F544 contain two sets of eight D-type latches, with separate input and controls for each set. For data flow from A to B, for example, the A-to-B Enable (EAB) input must be Low in order to enter data from A0 - A7 or take data from B0 - B7, as indicated in the Function Table. With EAB Low, a Low signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent Low-to-High transition for the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With EAB and OEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches. Control of data flow from B to A is similar, but using the EBA, LEBA, and OEBA inputs. TYPICAL PROPAGATION DELAY 6.0ns 6.5ns TYPICAL SUPPLY CURRENT (TOTAL) 80m A 95m A - bines74F245 and 74F373 type functions in one chip - 8-bit octal transceiver with D-type latch - 74F543 Non-inverting - Back-to-back registers for storage - Separate controls for data flow in each direction - A outputs sink 20m A and source 3m A - B outputs sink 64m A and source 15m A - 3-State outputs for bus-oriented applications - 74F543 available in SSOP Type II package DESCRIPTION The 74F543 and 74F544 Octal Registered Transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. While the 74F543 has non-inverting data path, the 74F544 inverts data in both directions. The A outputs are guaranteed to sink 24m A, while the B outputs are rated for 64m A. 74F544 Inverting TYPE 74F543 74F544 ORDERING INFORMATION DESCRIPTION MERCIAL RANGE VCC = 5V ±10%, TA...