74F712A Description
The 74F711A/74F711-1 consist of five 2-to-1 multiplexers designed for address multiplexing of dynamic RAMs and other multiplexing applications. The 74F711A has a mon select (S) input, an Output Enable (OE) input and an Output Inverting (INV) input to control the 3-State outputs. The outputs source 15mA and sink 64mA.
74F712A Key Features
- Consists of five 2-to-1 Multiplexers
- High impedance PNP base inputs for reduced loading
74F712A Applications
- Consists of five 2-to-1 Multiplexers
- High impedance PNP base inputs for reduced loading