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74F824 Description

The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. The 74F821/74F822 are buffered 10-bit wide versions of the popular 74F374/74F534 functions. The 74F822 is the inverted output version of 74F821.

74F824 Key Features

  • High speed parallel registers with positive edge-triggered D-type
  • High performance bus interface buffering for wide data/address
  • IIL is 20µA vs 1000µA for AM29821 series
  • Buffered control inputs to reduce AC effects
  • Ideal where high speed, light loading, or increased fan-in as
  • Positive and negative over-shoots are clamped to ground
  • 3-State outputs glitch free during power-up and power-down
  • Slim Dip 300 mil package
  • Broadside pinout patible with AMD AM 29821-29826 series
  • Outputs sink 64mA and source 24mA