Philips 74HCT137
The 74HC/HCT137 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. The “137” essentially combines the 3-to-8 decoder function with a 3-bit storage latch.| Part No. | 74HCT137 |
|---|---|
| Datasheet | 74HCT137 Download |
| Manufacturer |  Philips |
| Description | 3-to-8 line decoder/demultiplexer |
| Buy | Stock & Price |
FEATURES
● Combines 3-to-8 decoder with 3-bit latch● Multiple input enable for easy expansion or independent controls
● Active LOW mutually exclusive outputs
● Output capability: standard
● ICC category: MSI
GENERAL DESCRIPTION
7A. 74HC/HCT137 The 74HC/HCT137 are 3-to-8 line decoder/demultiplexers with latches at the three address inputs (An). When the latch is enabled (LE = LOW), the “137” acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The “137” is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems. QUICK REFERENCE DATA GND = 0 V; Tamb= 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay An to Yn LE to Yn E1 to Yn E2 to Yn CI CPD Notes 1.
