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74HCT137 - High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer

Download the 74HCT137 datasheet PDF. This datasheet also covers the 74HC237 variant, as both devices belong to the same high-speed cmos logic 3 to 8-line decoder/demultiplexer family and are provided as variant models within a single manufacturer datasheet.

General Description

Both circuits have three binary select inputs (A0, A1 and A2) that can be latched by an active High Latch Enable (LE) signal to isolate the outputs from select-input changes.

A “Low” LE makes the output transparent to the input and the circuit functions as a one-of-eight decoder.

Key Features

  • Select One of Eight Data Outputs - Active Low for CD74HC137 and CD74HCT137 - Active High for ’HC237 and CD74HCT237.
  • l/O Port or Memory Selector.
  • Two Enable Inputs to Simplify Cascading.
  • Typical Propagation Delay of 13ns 15pF, TA = 25oC (CD74HC237) at VCC = 5V,.
  • Fanout (Over Temperature Range) - Standard Outputs.
  • 10 LSTTL Loads - Bus Driver Outputs.
  • . . . 15 LSTTL Loads.
  • Wide Operating T.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC237-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT137 3-to-8 line decoder/demultiplexer Philips
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74HCT132 Quad 2-input NAND Schmitt trigger nexperia
74HCT132-Q100 Quad 2-input NAND Schmitt trigger nexperia
74HCT132A Quad 2-Input NAND Gate ON Semiconductor

Other Datasheets by Texas Instruments

Part Number Description
74HCT123 High-Speed CMOS Logic Dual Retriggerable Monostable Multivibrators
74HCT147 High-Speed CMOS Logic
74HCT158 Quad 2-Input Multiplexers
74HCT158 Quad 2-Input Multiplexers
74HCT166 High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Data sheet acquired from Harris Semiconductor SCHS146F March 1998 - Revised October 2003 CD74HC137, CD74HCT137, CD54HC237, CD74HC237, CD74HCT237 High-Speed CMOS Logic, 3- to 8-Line Decoder/Demultiplexer with Address Latches [ /Title (CD74 HC137 , CD74 HCT13 7, CD74 HC237 , CD74 HCT23 7) /Subject (High Speed Features • Select One of Eight Data Outputs - Active Low for CD74HC137 and CD74HCT137 - Active High for ’HC237 and CD74HCT237 • l/O Port or Memory Selector • Two Enable Inputs to Simplify Cascading • Typical Propagation Delay of 13ns 15pF, TA = 25oC (CD74HC237) at VCC = 5V, • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . .