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74HCT195 - 4-bit parallel access shift register

Datasheet Summary

Description

The 74HC/HCT195 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

Features

  • Asynchronous master reset.
  • J, K, (D) inputs to the first stage.
  • Fully synchronous serial or parallel data transfer.
  • Shift right and parallel load capability.
  • Complement output from the last stage.
  • Output capability: standard.
  • ICC category: MSI.

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Datasheet preview – 74HCT195

Datasheet Details

Part number 74HCT195
Manufacturer Philips
File Size 67.33 KB
Description 4-bit parallel access shift register
Datasheet download datasheet 74HCT195 Datasheet
Additional preview pages of the 74HCT195 datasheet.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT195 4-bit parallel access shift register Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification 4-bit parallel access shift register FEATURES • Asynchronous master reset • J, K, (D) inputs to the first stage • Fully synchronous serial or parallel data transfer • Shift right and parallel load capability • Complement output from the last stage • Output capability: standard • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT195 are high-speed Si-gate CMOS devices and are pin c
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