74HCT4016 Datasheet | Philips Semiconductors

FEATURES - Low “ON” resistance: 160 Ω (typ.) at VCC = 4.5 V 120 Ω (typ.) at VCC = 6.0 V 80 Ω (typ.) at VCC = 9.0 V - Individual switch controls - Typical “break before make” built in - Output capability: non-standard - ICC category: SSI GENERAL DESCRIPTION The 74HC/HCT4016 are high-speed Si-gate CMOS devices and are pin patible with the “4016” of the “4000B” series. They are specified in pliance with JEDEC standard no. 7A. The 74HC/HCT4016 have four independent analog switches (transmission gates). Each switch has two input/output terminals (Yn, Zn) and an active HIGH enable input (En). When En is connected to VCC, a low bidirectional path between Yn and Zn is established (ON condition). When En is connected to ground (GND), the switch is disabled and a high impedance between Yn and Zn is established (OFF condition). Current through a switch will not cause additional VCC current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VCC >> (VY, VZ) >> GND. Inputs Yn and Zn are electrically equivalent terminals. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns SYMBOL PARAMETER CONDITIONS t PZH/ t PZL t PHZ/ t PLZ CI CPD CS turn “ON” time En to VOS turn “OFF” time En to VOS input capacitance power dissipation capacitance per switch max. switch capacitance CL = 15 p F; RL = 1 kΩ; VCC = 5 V notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ { (CL + CS) × VCC2 × fo } where: fi = input frequency in MHz fo = output frequency in MHz ∑ {(CL + CS) × VCC2 × fo} = sum of outputs CL = output load capacitance in p F CS = max. switch capacitance in p F VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V TYPICAL HC 16 14 3.5 12 5 HCT 17 20 3.5 12 5 UNIT ns ns p F p F p F ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. December 1990 Philips Semiconductors Quad...